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Title

ASIC Verification Engineer 

Description

Base2 Engineering has exciting opportunities on our new prime contract on site with our customer to Make the Mission Happen.

We are looking for a talented ASIC Verification Engineer with in-depth understanding of the ASIC. The position includes:

  • Lead verification effort for ASIC
  • Devise and document a verification test plan for an ASIC development.
  • Assist with designing new products and processes and improving and maintaining existing products
  • Communicate with the other engineering personnel to coordinate the interrelated design and assure project completion
  • Conduct design analysis on components and/or assemblies to assist in the development process by ensuring designs are cost efficient, able to be manufactured, and reliable
  • Apply ASIC or FPGA Place and Route (P&R) tools with various libraries to create physical implementations of designs
  • Develop and maintain documentation for the P&R design flows
  • Design new products and processes and improving and maintaining existing products
  • Work with tool and library vendors to develop solutions for designers’ P&R design challenges
 
Position Requirements
  • BSEE/CE and a minimum of 5+ years of engineering experience
  • Expertise using CAD tools (e.g., Cadence, Mentor Graphics, Synopsys) for synthesis, formal verification, floor planning, bus/pin planning, place and route, power/clock distribution, congestion analysis, timing closure, IR drop analysis, physical verification, and ECOs
  • Exposure to current CMOS process technology, ASIC design flow, and design methodology challenges and configuration/data management
  • Experience with System Verilog for verification beneficial.
  • Experience with DSPs, MCUs, FPGAs, SoC and low-power design will be considered a big plus
  • Strong verbal and written communication skills

Clearance: All candidates must be fully cleared to include FS poly.

Base2 is an equal opportunity employer.

 

This position is currently accepting applications.

Apply Now


 


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