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ASIC Design Engineer 


Base2 Engineering has exciting opportunities on our new prime contract on site with our customer to Make the Mission Happen.

We are looking for a talented ASIC Design Engineer with in-depth understanding of the ASIC (library-based, and/or full custom) design flow to tape-out, including synthesis, placement and routing, DFT, clock trees, static timing analysis, logic equivalence checking, DRC, LVS, DFM, and parasitic extraction. The position includes:

  • Chip-level floor planning, integration planning, and execution
  • Incorporation of commercially-available soft, firm, and hard macros
  • Design closure, including timing, power, noise, and physical verification
Position Requirements
  • BSEE/CE and a minimum of 5+ years of engineering experience
  • Expertise using CAD tools (e.g., Cadence, Mentor Graphics, Synopsys) for synthesis, formal verification, floor planning, bus/pin planning, place and route, power/clock distribution, congestion analysis, timing closure, IR drop analysis, physical verification, and ECOs
  • Exposure to current CMOS process technology, ASIC design flow, and design methodology challenges and configuration/data management
  • Scripting experience (e.g., Tcl, Perl or Python)
  • Ability to work with, and augment or improve, existing tools, flows, and automation around flows as needed
  • Experience with DSPs, MCUs, FPGAs, SoC and low-power design will be considered a big plus
  • Strong verbal and written communication skills

Clearance: All candidates must be fully cleared to include FS poly.

Base2 is an equal opportunity employer.


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